module byte_rotor_r(
  input  [31:0] in,
  input  [ 1:0] rot,
  output [31:0] out
);

reg out;

always @* begin
  case (rot)
    2'h0: out =  in;
    2'h1: out = {in[ 7:0], in[31: 8]};
    2'h2: out = {in[15:0], in[31:16]};
    2'h3: out = {in[23:0], in[31:24]};
  endcase
end

endmodule
